Core Components


星上智能算力系统

Joint research and development and application of core control chips for small satellites, achieving miniaturization and high computing power for satellite integrated electronic systems.

R&D cycle: 12 months


Joint research and development and application of smart supercomputers and their operating systems (based on the native HarmonyOS operating system) for small satellites, enabling satellite intelligence, onboard AI data recognition and processing, routing and forwarding, and data security.

R&D cycle: 12 months


Satellite intelligent control system